Mediaprocessors Provide High Performance by Using Both Instruction - and Data - Level Parallelism . Because of the Increased Computing Power , Transferring Data between off - and on - Chip Memories without Slowing Down

0272-1732/01/$10.00  2001 IEEE Mediaprocessors are programmable processors specifically designed to provide flexible, cost-effective, high-performance computing platforms for multimedia computing. Multimedia streams carry enormous amounts of data, and efficiently handling that data is becoming increasingly more important in high-performance multimedia computing. Moreover, the dataand instruction-level parallelism in mediaprocessors shortens processing time, making more functions and applications I/O bound rather than compute bound. The growing speed disparity between the processor and off-chip memory further exasperates the problem of how to efficiently move data. Most general-purpose processors use data caches to transfer data between slower off-chip and faster on-chip memories. Some digital signal processors (DSPs), on the other hand, use direct memory access (DMA) controllers to move data between offand on-chip memories, more directly controlling memory access than the data cache mechanism. DMA’s direct control allows a predictable access time, which is critical in many real-time DSP applications. A double-buffering technique lets a DMA controller work independently of the core processing unit. Most mediaprocessors have either a data cache or a DMA controller, but not both, so programmers must use whichever is provided. However, some mediaprocessors support both data cache and DMA on a single chip— for example, the MAP1000 and the TMS320C64x. In this case, programmers must answer three questions: